- Shell Script is series of command written in plain text file.
- To find all available shells in your system type following command:
$cat /etc/shells - To find your current shell type following command
$ echo $SHELL - Example:
- Mar 01 Sat 2008 23:03
Shell script - 1. Getting started with Shell Programming
- Feb 15 Fri 2008 10:51
Building a cross compiler with buildroot
Build a cross compiler for nommu architecture and the cross compiler should be able to generate excutables with ELF or bFLT file format.
OS: Ubuntu 7.10
- Feb 13 Wed 2008 10:41
Building and installing uClibc
Platform: i386
OS: Linux
- Feb 11 Mon 2008 10:35
Building and installing a native GCC compiler
Reference data: The Definitive Guide to GCC, second edition, William von Hagen
Environment: Ubuntu 7.10
Prerequisite: Prepare about 1.5 GB free disk space for building and installing GCC.
- Feb 09 Sat 2008 12:58
閱讀 - 記憶力
- Feb 03 Sun 2008 20:25
[轉貼] 1週工作4小時的少年頭家-提摩西.費里斯 (CHEERS快樂工作報)
要如何1星期只工作4小時,卻能成功經營一家營業額120萬美元(約台 幣3千6百萬元)的公司,同時又能四處旅行10多個國家?
有一個30歲的美國青年做到了。他是當今美國最紅的少年頭家提摩西. 費里斯(Timothy Ferriss)。
有一個30歲的美國青年做到了。他是當今美國最紅的少年頭家提摩西. 費里斯(Timothy Ferriss)。
- Jan 24 Thu 2008 23:10
make - 4. Functions
- GNU make supports both built-in and user-defined functions.
- Most built-in functions expand to some value that is then assigned to a variable or passed to a subshell.
- A user-defined function is stored in a variable or macro and expects one or more parameters to be passed by the caller.
AWK := awk
KILL := kill
- Jan 22 Tue 2008 00:41
make - 3. Variables and Macros
- make is sort of two languages in one:
- The first language describes dependency graphs consisting of targets and prerequisites.
- The second language is a macro language for performing textual substitution.
- The only characters actually disallowed in a variable name are :, #, and =.
- To get the value of a variable, enclose the variable name in $() or ${}, but single-letter variable names can omit the parentheses.
- The value of a variable consists of all the words to the right of the assignment symbol with leading space trimmed. Trailing spaces are not trimmed.
- In general it is a good idea to use variables to represent external programs. This allows users of the makefile to more easily adapt the makefile to their specific environment.
- Variables can also store user-defined command sequences.
- A simply expanded variable (or a simple variable) is defined using the := assignment operator:
MAKE_DEPEND := $(CC) –M
- Jan 20 Sun 2008 17:15
make - 2. Rules
- Building and processing the dependency graph to update the requested target is what make is all about.
- There are a number of different kinds of rules:
- Explicit rules indicate a specific target to be updated if it is out of date with respect to any of its prerequisites.
- Implicit rules are either pattern rules or suffix rules found in the rules database built-in to make.
- Pattern rules use wildcards instead of explicit filenames. This allows make to apply the rule any time a target file matching the pattern needs to updated.
- Static pattern rules are like regular pattern rules except they apply only to a specific list of target files.
- A rule does not have to be defined "all at once." Each time make sees a target file it adds the target and prerequisites to the dependency graph. If a target has already been seen and exists in the graph, any additional prerequisites are appended to the target file entry in make's dependency graph.
- make supports wildcards (also known as globbing).
- make's wildcards are identical to the Bourne shell's: ~, *, ?, [...], and [^...].Wildcard expansion is performed by make when the pattern appears as a target or prerequisite, when the pattern appears in a command, the expansion is performed by the subshell.
- In other contexts, wildcards can be expanded explicitly by calling a function.
- In more controlled environments using wildcards to select the files in a program is considered bad practice because a rogue source file might be accidentally linked into a program.
- GNU make includes a special target, .PHONY, to tell make that a target is not a real file. Any target can be declared phony by including it as a prerequisite of .PHONY:
.PHONY: clean
clean:
- Jan 18 Fri 2008 17:48
make - 1. How to Write a Simple Makefile
這是讀"Managing Projects with GNU Make"的筆記,make真的是非常的有趣呀。
1.1 Targets and Prerequisites

1.1 Targets and Prerequisites
- A rule consists of three parts: the target, its prerequisites, and the command(s) to perform: One or more targets appear to the left of the colon and zero or more prerequisites can appear to the right of the colon.
target1 target2 target3: prereq1 prereq2
- Jan 15 Tue 2008 18:34
U-boot Introduction
這是我做presentation時的slide,對U-boot的簡介,我是以/cpu/arm946es和/board/integratorcp的架構來準備的。
將來有機會再做入的探討吧。
- Jan 08 Tue 2008 13:04
gdb
- Compile the program with the -g option, this causes the compiler to generate an augmented symbol table.
- $gdb [program] [core-dump]
- gdb options:
-d dir
Tell gdb to look in dir for source files. Ex: gdb –d /work/phase1 –d /work/phase2 foo.
- Dec 28 Fri 2007 08:14
Basic Introduction - gcc
- By default, gcc compiles the source code, assembles the assembly language code the compiler produces, and invokes the UNIX loader, Id, to produce an executable file.
- Preprocessing: This step resolves directives like #define, #include, and #if. Like many UNIX systems, gcc invokes a separate utility called cpp to do the preprocessing.
- Compilation: This produces assembly language from the input files; since the assembler is usually invoked right away, the output is not normally saved in files.
- Assembly: This takes the assembly language as input and produces object files with extensions. While some compilers build in the assembly capability, gcc does it by internally invoking a separate utility called the assembler, gas. GNU assemblers aren't available for all architectures; if the GNU assembler isn't available, gcc invokes the "native" assembler (as).
- Linking: This is the final stage, where the modules are placed in their proper places in the executable file. Library functions that the program refers to are also placed in the file. (Systems with shared libraries use a slightly more complicated method.)
UNIX compilers perform this phase by internally invoking the linker, which is called ld. - gcc also cleans up by deleting any object files that it created from source files (but not any pre-existing object files that you specified on the command line).
- ld stands for "link editor" initially, but we haven't heard anybody use this term for years. In some early UNIX documentation, ld is also called a "loader," which can be confusing because most people think of loading as reading the executable file into memory at run time.
- General options:
-o
- Dec 24 Mon 2007 22:40
[轉貼] 一個日本歐巴桑餵養一萬尼泊爾人 (商業周刊電子報)