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  • By default, make looks first for a makefile named makefile, then it looks for Makefile.
  • A simple example: two targets, stimulate and stimulate.db
# A very simple makefile.
# Lines beginning with # are comments.
# Targets begin at the left margin, followed by : .
# Shell command lines must begin with a tab.
simulate:
# Shell commands to create stimulate
    gcc -o stimulate -O stimulate.c inputs.c outputs.c
stimulate.db:
# Shell commands to create stimulate.db
   
gcc -DDEBUG -g -o stimulate.db stimulate.c inputs.c outputs.c
  • The symbol DEBUG is defined for the preprocessor, telling it to include any debugging code present in the source files.
  • make generates a new shell for each UNIX command line that it executes.
  • In the makefile, you can use the continuation character (\) to extend a single UNIX command line over several physical lines.
  • To invoke make, where target is the name of one of the targets defined in the makefile.
$ make [target]
  • A target line with dependencies:
target-name: list-of-dependencies
  • The first line says that the target stimulate depends on the object files stimulate.o, inputs.o, and outputs.o. "The target stimulate is out of date if it is older than stimulate.o, inputs.o, or outputs.o. If this is the case, create a new version of stimulate by linking these object files.
stimulate: stimulate.o inputs.o outputs.o
   
gcc -o stimulate stimulate.o inputs.o outputs.o
stimulate.o: stimulate.c
   
gcc -c -O stimulate.c
inputs.o: inputs.c headerfile.c
   
gcc -c -O inputs.c
outputs.o: outputs.c
   
gcc -c -O outputs.c
  • make takes the following steps to generate a target:
    • Checks to see if the files on which a target depends are up to date with respect to their own sources
    • Creates a new version of any file that is out of date
    • Checks to see if the target is up to date with respect to the files on which it depends
    • Creates a new version of the target if it is out of date
  • make is recursive, it continues checking dependencies until it can guarantee that all the files needed to generate a target are current.
  • Target example, clean:
clean:
           rm *.o *.do *~ stimulate stimulate.db
  • It is also common to see a target named install, which moves the finished executable to its final home and sets its access modes appropriately.
  • Abbreviations:

$@

The full name of the target.

$*

The name of the target with the suffix deleted.

$<

The first prerequisite.

stimulate.db: stimulate.do inputs.do outputs.do
   
gcc -o $@ $*.do inputs.o outputs.o  /* $@ stands for stimulate.db, $* stands for stimulate , or*/
   
gcc -o $@ $< inputs.o outputs.o       /* $@ stands for stimulate.db, $* stands for stimulate.do */
  • A macro definition begins at the left margin of the makefile and has the form:
macro-name = macro-body
  • When make is processing the makefile, it substitutes macro-body for the string $(macro-name).
DEPENDS = inputs.o outputs.o stimulate.o
DBDEPENDS = inputs.do outputs.do stimulate.do
stimulate: $(DEPENDS)
   
gcc -o $@ $(DEPENDS)
stimulate.db: $(DBDEPENDS)
   
gcc -o $@ $(DBDEPENDS)
  • Macros are also useful for defining a set of compilation options.
CFLAGS = -DDEBUG –g
  • Adding a VPATH line to the makefile allows make to find files in directories other than the current directory.
VPATH=dir1:dir2:…:dirn
  • To use suffix rules, you must define a set of significant suffixes. (Standard UNIX documentation refers to these suffixes as  prerequisites.)
  • To specify the list of significant suffixes, use the .SUFFIXES: keyword, followed by the list of suffixes that are involved in any default rules.
  • By itself, .SUFFIXES: clears the suffix list. When it is followed by one or more suffixes, a .SUFFIXES: line adds the new suffixes to the list.
# Start by clearing the list of suffixes.
.SUFFIXES:
# We want to specify suffix rules for .c, .o, and .do files.
.SUFFIXES: .c .o .do
  • The appearance of these suffixes in a target line causes make to use a suffix rule to generate this target, if an appropriate rule exists.
  • To specify a suffix rule, list the suffix of the file that make should search for (.c, for instance) followed by the one that make should build (.o or .do). Follow these suffixes by a colon and a semicolon, then enter a UNIX command, stated in as general terms as possible. There must be no spaces in the suffix list for a suffix rule.
.c.o:; gcc -c -o $@ -O $*.c
  • Overriding the suffix rule can be done by writing an explicit rule for a particular target file in the makefile.
  • GNU make provides a more general way of specifying defaults, called pattern rules.
%.o : %
           gcc $(CFLACS) -c $<    /* any object file can be built by replacing the .o in the filename with .c and compiling the file with the resulting name */
  • Flags:

-f filename

use file-name as a makefile, rather than the standard makefile.

-n

Don't execute any commands. Instead, list the commands that would be executed under normal conditions.

-i

Normally, make terminates immediately if a command returns a nonzero error code. The -i option forces make to ignore these error codes. (Alternatively, the makefile can include the special target .IGNORE.) This is particularly useful because some UNIX programs return a nonzero exit code incorrectly when used with make.

-k

The -k option is similar to -i, except that make does not attempt to build the target in which the error occurs. It continues to build any other targets required.

-q

Determine whether the target of this make is up to date, return a zero status code if the target is up to date.

-s

Normally, make prints all commands that it executes on the terminal. With this flag, make is silent and does not print any messages. (Equivalently, the makefile can include the special target .SILENT.)

-j

Run multiple commands at once.

-t

Don't execute any commands found within the makefile. Instead, "touch" all target files that are out of date, bringing them up to date without changing them.

-d

Print information on what targets are being built and what commands are running. Useful for debugging a makefile.

  • GNU make can run multiple commands at once (with –j option), using the standard multiprocessing capabilities of UNIX.
  • Error Messages:

No rule to make target 'target'. Stop.

The makefile does not contain any rules showing make how to construct the given target explicitly, and there are no default rules applicable to target.

‘target’ is up to date

The target you specified on the command line is already up to date.

missing separator. Stop.

In a makefile, each line following a target (i.e., each line describing how to build the target) must begin with a tab. This message informs you that the associated line should begin with a tab, but doesn't.

This message can also appear if you have a line of junk in the file-for instance, if you forgot to put a # character at the beginning of a comment, or continued a line without putting a backslash at the end of the previous line.

Target ‘target’ not remade because of errors.

This message appears only if you invoke make with the -k option. It means that an error (i.e., a nonzero exist status code) occurred while make was building target. As a result, make gave up work on that target and continued to the next.

command: Command not found

The command does not exist. If you can issue the command from your shell, there may  be some subtle problem-for instance, perhaps the command is really an alias and therefore is found by your shell, but not by make.

illegal option -- option

You have invoked make with a command-line option that it does not recognize. GNU make supports some options that contain multiple characters, but you must put two hyphens in front of them.

option requires an argument -- option

You have invoked make with an option such as -f that requires an additional argument.

Recursive variable 'macro' references itself (eventually). Stop.

The makefile contains a macro that it cannot expand because the macro includes itself (e.g., CFLAGS = $ (CFLAGS) )

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