nix

GNU make supports both built-in and user-defined functions.Most built-in functions expand to some value that is then assigned to a variable or passed to a subshell.A user-defined function is stored in a variable or macro and expects one or more parameters to be passed by the caller.4.1 User-Defined Functions
Storing command sequences in variables opens the door to a wide range of applications.AWK := awk
KILL := kill
KILL_FLAGS := -f
PS := ps
PS_FLAGS := -W
PS_FIELDS := "9 47 100"
# $(call kill-program,awk-pattern)
define kill-program
           @ $(PS) $(PS_FLAGS) |                                                    \
           $(AWK) 'BEGIN { FIELDWIDTHS = $(PS_FIELDS) }    \
                     /$1/  {                                                                         \          /* $1 stands for the first argument passed to the macro */
                                print "Killing " $$3;                                         \          /* $$3 stands for the value of the third field comes from print */
                                system( "$(KILL) $(KILL_FLAGS) " $$1 )  \
                     }'         /* Notice that awk command are quoted */
endef

make is sort of two languages in one:

• The first language describes dependency graphs consisting of targets and prerequisites.
• The second language is a macro language for performing textual substitution.

The only characters actually disallowed in a variable name are :, #, and =.To get the value of a variable, enclose the variable name in $() or ${}, but single-letter variable names can omit the parentheses.The value of a variable consists of all the words to the right of the assignment symbol with leading space trimmed. Trailing spaces are not trimmed.3.1 What Variables Are Used For

Building and processing the dependency graph to update the requested target is what make is all about.There are a number of different kinds of rules:

• Explicit rules indicate a specific target to be updated if it is out of date with respect to any of its prerequisites.
• Implicit rules are either pattern rules or suffix rules found in the rules database built-in to make.
• Pattern rules use wildcards instead of explicit filenames. This allows make to apply the rule any time a target file matching the pattern needs to updated.
• Static pattern rules are like regular pattern rules except they apply only to a specific list of target files.

2.1 Explicit Rules
A rule does not have to be defined "all at once." Each time make sees a target file it adds the target and prerequisites to the dependency graph. If a target has already been seen and exists in the graph, any additional prerequisites are appended to the target file entry in make's dependency graph.make supports wildcards (also known as globbing).make's wildcards are identical to the Bourne shell's: ~, *, ?, [...], and [^...].Wildcard expansion is performed by make when the pattern appears as a target or prerequisite, when the pattern appears in a command, the expansion is performed by the subshell.In other contexts, wildcards can be expanded explicitly by calling a function.In more controlled environments using wildcards to select the files in a program is considered bad practice because a rogue source file might be accidentally linked into a program.GNU make includes a special target, .PHONY, to tell make that a target is not a real file. Any target can be declared phony by including it as a prerequisite of .PHONY:

這是讀"Managing Projects with GNU Make"的筆記，make真的是非常的有趣呀。

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1.1 Targets and Prerequisites
A rule consists of three parts: the target, its prerequisites, and the command(s) to perform: One or more targets appear to the left of the colon and zero or more prerequisites can appear to the right of the colon.target1 target2 target3: prereq1 prereq2
[tab]commands1
[tab]commands1
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