這是我自己讀OPERATING SYSTEM CONCEPTS (6th Edition)的筆記,本來讀的進度很緩慢,直到有一天在網路上看到冼鏡光老師分享上課的slide(OS第7版),唸起OS就愈來有趣啦。
筆記的章節是依OS第6版整理的,圖片則都是從冼鏡光老師的slide貼上來的,感謝冼老師無私的分享,讓我有機會一窺OS的奧妙。
(如有著作權相關問題,請惠予通知)
![](https://pic.pimg.tw/nixchun/1186415924.jpg)
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![](https://pic.pimg.tw/nixchun/1186415926.jpg)
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2.4 Storage Hierarchy
2.4.2 Coherency and Consistency
2.6.1 Local-Area Networks
2.6.2 Wide-Area Networks
筆記的章節是依OS第6版整理的,圖片則都是從冼鏡光老師的slide貼上來的,感謝冼老師無私的分享,讓我有機會一窺OS的奧妙。
(如有著作權相關問題,請惠予通知)
2. Computer-System Structures
2.1 Computer-System Operation
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![](https://pic.pimg.tw/nixchun/1186415925.jpg)
- An event that requires the attention of the OS is an interrupt. These events include the completion of an I/O, a keypress, a request for service, a division by zero, invalid memory access and so on.
- In computing, an interrupt is an asynchronous signal from hardware indicating the need for attention or a synchronous event in software indicating the need for a change in execution. A hardware interrupt causes the processor to save its state of execution via a context switch, and begin execution of an interrupt handler. Software interrupts are usually implemented as instructions in the instruction set, which cause a context switch to an interrupt handler similarly to a hardware interrupt. Interrupts are a commonly used technique for computer multitasking, especially in real-time computing. Such a system is said to be interrupt-driven.
- Hardware interrupts were introduced as a way to avoid wasting the processor's valuable time in polling loops, waiting for external events.
- Interrupts may be implemented in hardware as a distinct system with control lines, or they may be integrated into the memory subsystem. If implemented in hardware, a Programmable Interrupt Controller (PIC) or Advanced Programmable Interrupt Controller (APIC) is connected to both the interrupting device and to the processor's interrupt pin. If implemented as part of the memory controller, interrupts are mapped into the system's memory address space.
- Interrupts may be generated (triggered) by hardware (by sending a signal to CPU, usually via the system bus) orsoftware (system call, monitor call).
- An interrupt generated by software (i.e., division by 0) is usually referred to as a trap or exception.
- Modern operating systems are interrupt driven, meaning the OS is in action only if an interrupt occurs.
- An interrupt service routine (ISR) is provided that is responsible for dealing with the interrupt.
- The interrupt vector (contains a table of pointers to ISR, usually stored in low memory) of addresses is indexed by a unique device number, given with the interrupt request, to provide the address of the interrupt service routine for the interrupting device.
2.2 I/O Structure
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- A device controller maintains some local buffer storage and a set of special-purpose registers. The device controller is responsible for moving the data between the peripheral devices that it controls and its local buffer storage.
- To start an I/O operation, the CPU loads the appropriate registers within the device controller. The device controller, in turn, examines the contents of these registers to determine what action to take.
- Synchronous I/O: returns control to the user program with waiting for the I/O complete.
- Asynchronous I/O: returns control to the user program without waiting for the I/O complete.
- The OS uses a device-status table containing an entry for each I/O device.
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- For large volume data transfer, most systems use direct memory access to avoid burdening the CPU.
- The CPU gives the controller (1) disk address, (2) memory address for storing the block, and (3) a byte count. Then, the CPU goes back to work.
2.3 Storage Structure
- Instruction-execution cycle under von Neumann architecture:
- CPU-Memory
- Fetch(instruction register) -> decode -> execute ->store
- To allow more convenient access to I/O devices, many computer architectures provide memory-mapped I/O, ranges of memory addresses are set aside, and are mapped to the device registers.
- The CPU transfers data through devices such as serial or parallel ports by reading or writing a few device registers, called an I/O port.
- If the CPU does uses polling to watch the control bit of the device register, constantly looping to see whether the device is ready, this method of operation is called programmed I/O (PIO).
- If the CPU does not poll the control bit, but instead receives an interrupt when the device is ready for the next byte, the data transfer is said to be interrupt driven.
- The transfer rate is the rate at which data flow between the drive and the computer.
- The positioning time (random-access time) consists of the time to move the disk arm to the desired cylinder, called the seek time, and the time for the desired sector to rotate to the disk head, called the rotational latency.
2.4 Storage Hierarchy
- Register, cache, main memory, electronic disk, magnetic disk (secondary storage device), optical disk, magnetic tape (faster <-> slower).
2.4.2 Coherency and Consistency
- Cache coherency: In a multiprocessor environment, if a data copy exists simultaneously in several caches, keep these copies consistency.
- Early operating systems were called resident monitors, and starting with the resident monitor, the operating system began to perform many of the functions, especially I/O, for which the programmer had previously been responsible.
- With spooling, one program might have been executing while I/O occurred for other processes.
- Modern CPUs have two execution modes: user mode and supervisor (or system, monitor, privileged) mode, controlled by a mode bit.
- The OS runs in supervisor mode and all user programs run in user mode.
- Some instructions that may do harm to the OS (e.g., doing I/O) are privileged instructions. Privileged instructions can only be used in the supervisor mode.
- When the control switched to the OS (resp., a user program), execution mode will be changed to supervisor (resp., user) mode.
- The concept of privileged instructions also provides us with the means for the user to interact with the operating system to perform some designated tasks that only the operating system should do. Such a request is known as a system call (monitor call, operating-system function call).
- When a system call is executed, it is treated by the hardware as software interrupt. Control passes through the interrupt vector to a service routine in the operating system, and the mode bit is set to monitor mode.
- To prevent users from performing illegal I/O, we define all I/O instructions to be privileged instructions.
- Provide memory protection at least for the interrupt vector and the interrupt-service routines of the OS.
- Provide program’s memory protection by using two registers, the base register holds the smallest legal physical memory address; the limit register contains the size of the range. This protection is accomplished by the CPU hardware comparing every address generated in user mode with the registers.
- Because the operating system must maintain the control over the CPU, we must prevent a user program from getting the CPU forever or not calling system service.
- Use an interval timer! An interval timer is a count-down timer.
- Before a user program runs, the OS sets the interval timer to certain value. Once the interval timer counts down to 0, an interrupt is generated and the OS can make appropriate action.
- A more common use of a timer is to implement time sharing. The timer could be set to interrupt every N milli-seconds, where N is the time slice that each user is allowed to execute before the next user gets control of the CPU.
2.6.1 Local-Area Networks
2.6.2 Wide-Area Networks
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